1. Field of the Invention
The present invention relates to a voltage regulator configured to operate with low current consumption, and having good responsiveness.
The present application claims priority based on Japanese Patent Application No. 2016-006486 filed in Japan on Jan. 15, 2016, the disclosures of which are incorporated herein by reference in their entirety.
2. Description of the Related Art
Voltage regulators are provided in electronic devices such as cellular phones, which are configured to operate with rechargeable batteries, such that the electronic devices stably operate even when a charged state of the batteries fluctuates. Further, the voltage regulator, which is configured to prevent an output voltage from fluctuating such that the electronic device stably operates even when a load sharply fluctuates, is provided with a control circuit for achieving a more stable output voltage of the voltage regulator in some cases.
FIG. 3 is a circuit diagram of a related-art voltage regulator 30. A reference voltage circuit 31 is configured to output a reference voltage Vref. From a resistor 32 and a resistor 33, a feedback voltage VFB obtained by dividing an output voltage Vout at an output terminal by the resistors is output. A voltage amplifier circuit 34 is configured to control a PMOS transistor 35 based on a result of comparison between the reference voltage Vref and the feedback voltage VFB such that the output voltage Vout is constant. A transient response improvement circuit 36 is configured to receive the reference voltage Vref and a power supply voltage as input to control an operating current of the voltage amplifier circuit 34.
The transient response improvement circuit 36 includes a detection portion configured to detect fluctuation in power supply voltage, and an output portion, and is configured to detect fluctuation in power supply voltage and to control an operating current that is to flow through the voltage amplifier circuit 34. With increase in current of the voltage amplifier circuit 34 depending on the detected power supply voltage level, the transient response characteristics of the voltage amplifier circuit 34 are improved.
FIG. 4 is a circuit diagram of the transient response improvement circuit and the voltage amplifier circuit according to the related art. The transient response improvement circuit 36 includes a constant current portion including PMOS transistors 1 and 2, a detection portion including NMOS transistors 3 and 4 and a capacitor 6 and being configured to detect fluctuation in power supply voltage, and an output portion including an NMOS transistor 5.
The transient response improvement circuit 36 is configured to detect fluctuation in power supply voltage to control a current that is to flow through the voltage amplifier circuit 34. The operating current of the voltage amplifier circuit 34 is increased depending on a decreasing level of the detected power supply voltage, that is, the transient response of the voltage amplifier circuit 34 is improved (for example, see Japanese Patent Application Laid-open No. 2006-18774).
However, in the transient response improvement circuit described above, after fluctuation in power supply voltage is detected and the operating current of the voltage amplifier circuit is increased, timing at which the operating current of the voltage amplifier circuit is returned to a normal value cannot be arbitrarily set. Thus, there is a drawback that the operating current of the voltage amplifier circuit is returned to the normal value during transient response, and optimal transient response characteristics cannot be obtained.
In addition, the transient response improvement circuit described above has a drawback that the operating current of the voltage amplifier circuit is excessively increased and the voltage amplifier circuit does not stably operate, when a voltage decreasing level of a detected power supply voltage is large.